The present invention generally relates to semiconductor processing, and in particular to a system for regulating post exposure development time and temperature.
In the semiconductor industry, there is a continuing trend toward higher device densities. To achieve these high densities there have been, and continue to be, efforts toward scaling down device dimensions (e.g., at sub-micron levels) on semiconductor wafers. In order to accomplish such high device packing densities, smaller and smaller features sizes are required. This may include the width and spacing of interconnecting lines, spacing and diameter of contact holes, and the surface geometry such as corners and edges of various features. Creating features with such reduced device dimensions can require fine control of developing processes, including controlling time and temperature of post exposure developing.
The process of manufacturing semiconductors, or integrated circuits (commonly called ICs, or chips), typically consists of more than a hundred steps, during which hundreds of copies of an integrated circuit may be formed on a single wafer. Generally, the process involves creating several patterned layers on and into the substrate that ultimately forms the complete integrated circuit. This layering process creates electrically active regions in and on the semiconductor wafer surface. Controlling the size, shape and/or location of such electrically active regions can depend on the time over which and the temperature at which a wafer is heated during development after being exposed to a pattern. Thus, sophisticated manufacturing techniques including high-resolution photolithographic processes, including control of development time and temperatures, are required, to achieve desired critical dimensions and yields.
A masking step is employed to protect one area of the wafer while working on another. This process is referred to as photolithography or photo-masking. A photo resist or light-sensitive film is applied to the wafer, giving it characteristics similar to a piece of photographic paper. A photo aligner aligns the wafer to a mask and then projects an intense light through the mask and through a series of reducing lenses, exposing the photo resist with the mask pattern. But exposing the pattern is not all that is involved in developing the pattern. Post exposure development processes can produce differing results based on the time over which and the temperature at which a wafer with a pattern exposed thereon is processed.
Due to the extremely fine patterns that are exposed on the photo resist, controlling the development temperature and the time period over which one or more temperatures are applied during development are significant factors in achieving desired critical dimensions. Maintaining the developer at a desired temperature for a desired period of time may enable uniformity and quality of the underlying photo resist layer being developed. Small changes in the time and temperature history of the developer can substantially alter image sizes, resulting in lack of image line control. For example, a few degrees temperature difference and/or an overly long or short developing time may drastically affect critical dimensions. For example, often substantial line size deviations occur when the developer temperature is not maintained within 0.5 degree tolerance across a silicon wafer or when a wafer is developed for too long a period of time.
Time and temperature are related in the development process. For example, higher temperatures within a range may cause faster development, while lower temperatures may cause slower development. Ideally, all portions of a wafer would develop at precisely the same rate when subjected to identical temperatures for identical times. Unfortunately, such uniform development does not always occur, with different wafer portions developing at different rates. For example, the center of a wafer may develop at a different rate than the edge of a wafer.
The apparatus employed to expose patterns on a wafer may produce variations including, but not limited to, exposure duration, focus and dosage. Thus, the patterns exposed on a wafer may vary, based on such exposure variations. Conventional systems may not account for such variations, basing time and temperature for post exposure development on pre-calculated formulae.
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is not intended to identify key/critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides a system that facilitates controlling development temperature and the time over which development temperatures are applied. The present invention can base such control on in situ scatterometry based data acquisition and control information feedback, which provides benefits over conventional systems. An exemplary monitoring system may employ one or more light sources arranged to project light onto one or more patterns exposed on a wafer and/or one or more gratings exposed on the wafer, and one or more light sensing devices (e.g., photo detector, photodiode) for detecting light reflected by and/or allowed to pass through the one or more patterns and/or gratings. The light reflected from and/or passing through one or more patterns and/or gratings is indicative of at least one parameter of the development process (e.g., percent completion of development) that may vary in correlation with developing time and temperature. Such collected light can be employed to generate one or more signatures that can be employed to generate feedback information to control the time and temperature.
In the present invention, one or more heaters are arranged to correspond to particular wafer portions, to facilitate controlling the heat applied to the respective wafer portions. Each heater may be responsible for heating one or more particular wafer portions. The heaters are selectively driven by the system to produce a desired temperature at a wafer portion for a desired time. The heaters may be, for example, heaters and/or coils. The development progress is monitored by the system by comparing the size and/or shape of the patterns and/or gratings on the wafer to desired size and/or shapes. As a result, more optimal development is achieved by controlling the temperatures applied to the portions of the wafer, which in turn increases fidelity of image transfer. Conventional systems may employ pre-determined times and/or temperatures for post exposure developing processes, and thus may not acquire in situ data that can be analyzed to adapt the post exposure developing process. Thus, the present invention, by acquiring such in situ data, and by generating feedback information to adapt the post exposure developing process based on such in situ data provide benefits over conventional systems.
One particular aspect of the invention relates to a system for regulating development time and temperature. At least one heater operates to heat a portion of a wafer, and a heater driving system drives the at least one heater. A system for directing light directs light to one or more patterns and/or gratings being developed on the wafer, and a measuring system measures parameters of the one or more patterns and/or gratings based on light reflected and/or passed through the patterns and/or gratings. A processor is operatively coupled to the measuring system and a heater driving system. The processor receives pattern and/or grating parameter data from the measuring system and the processor uses the data to at least partially base control of the at least one heater so as to regulate temperature of the at least one portion of the wafer being developed.
Another aspect of the present invention relates to a method for regulating development temperature. The method includes defining a wafer as a plurality of portions, developing one or more patterns and/or gratings on a wafer, directing light onto at least one of the patterns and/or gratings and collecting light reflected by and/or passed through the at least one grating. The collected light is analyzed to determine the progress of development of the wafer, with such analysis producing feedback data that is employed in controlling a heating device to regulate the development time and/or temperature.
Still another aspect of the present invention relates to a method for regulating development time and temperature. The method includes partitioning a wafer into a plurality of grid blocks, developing one or more patterns and/or gratings on a wafer and employing one or more heaters to heat the wafer, with each heater functionally corresponding to a respective grid block. The method includes determining the progress of the development of portions of the wafer, where each portion corresponds to a grid block and using a processor to coordinate control of the heaters in accordance with determined and desired temperatures of the respective portions of the wafer.
To the accomplishment of the foregoing and related ends, the invention, then, comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative examples of the invention. These examples are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.